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SYNCHRONOUS: 4-BIT COUNTER MODULO-16 D FLIPFLOP
by Isai Damier

The interactive 4-Bit Counter with D FlipFlop digital logic circuit, with Boolean function

Four-Bit Modulo-16 D-Flipflop Counter

As we might say that the heart of a living person beats as time passes, even so a counter is a logic circuit that counts as time passes. The interactive circuit above is a four-bit counter that is designed to count from zero (0000) to fifteen (1111) as time passes. When it reaches fifteen, it loops back and starts again at zero; and so on forever (i.e. as long as time exists). Since our counter counts from the low value zero to the high value fifteen, we say it is an up-counter. Furthermore, we say it is a modulo-sixteen counter because there are sixteen numbers between zero and fifteen inclusive.

Designing counters using Data Latches can be a simple and straightforward process. For example, if you have n data latches, then you can design a counter that can count from 0 to 2n - 1: This means if you want to count from zero to fifteen, then you need to solve for n in the equation 2n -1 = 15; which solves as n (= log 16 / log 2) = 4; which means you need 4 data latches.

In the next section we will go through the process of designing our modulo-16 counter. But, before we do, here is a picture (Figure 1) of the finished product with the labels that we will be referring to in the rest of the article. The uppercase labels W, X, Y, and Z, which are the outputs of the combinational circuits, are referred to as the next state signals, the flipflop input signals, or the flipflop input equations. The lowercase labels w, x, y and z are referred to as the output signals or the present state equations.

Labeled Modulo-16 D-Flipflop Counter
Figure 1: Labeled Modulo-16 D-Flipflop Counter

DESIGN AND SYNTHESIS

Generally, the problem statement will read: Design a circuit to count from zero to fifteen. Include a switch to enable pausing the circuit.

As it is always a good idea to try to visualize what the question is asking, we will start our design by drawing a diagram using what we know. We know the following: if the current count is zero (0), then the next count must be one (1); the next count after one must be two (10); then three (11); then four (100); then so on until the count reaches fifteen (1111). Another detail we know is that we need to include a switch to enable freezing/pausing the circuit between counts. We can draw this sequence of numbers as shown in Figure 2 below.

Figure 2 is formally known as a state diagram because each ellipse represents one of the states that the circuit can ever possibly be in, and each arrow shows how the circuit moves from state to state depending on whether the enable switch (E) is 1 or 0. The colored arrow shows that after the circuit has reached the number fifteen (1111), it will restart at zero (0000) and continue on from there.

4-Bit Counter State Diagram
Figure 2: Four-Bit Counter State Diagram

Although a state diagram is very easy to understand, in order to use the state diagram to build a circuit, we need to transform the diagram into a table because it is easier to write the Boolean expressions from a table description of the problem (kind of like truth tables). We show the state transition table in Table 1 below. Notice that when E = 0, the circuit will not change state; only when E = 1 does the counting continue.

Present StateNEXT STATE
E = 0E = 1
0000 0000 0001
0001 0001 0010
0010 0010 0011
0011 0011 0100
0100 0100 0101
0101 0101 0110
0110 0110 0111
0111 0111 1000
1000 1000 1001
1001 1001 1010
1010 1010 1011
1011 1011 1100
1100 1100 1101
1101 1101 1110
1110 1110 1111
1111 1111 0000

Table 1

Just as we would in a truth table, we must label the bits of the state transition table so as to be able to derive Boolean expressions from the table. So we recreate the table as Table 2, with the bits labeled. We use lower cases for the present states and upper cases for the next states.

Present StateNEXT STATE
E = 0E = 1
wxyz WXYZ WXYZ
0000 0000 0001
0001 0001 0010
0010 0010 0011
0011 0011 0100
0100 0100 0101
0101 0101 0110
0110 0110 0111
0111 0111 1000
1000 1000 1001
1001 1001 1010
1010 1010 1011
1011 1011 1100
1100 1100 1101
1101 1101 1110
1110 1110 1111
1111 1111 0000

Table 2

Once we have determined the state transition table of a design problem, the natural next step is to derive the switching expressions for the circuit. Before we do, however, we typically use a shortcut: decide on which type of flipflops to use. The explanation for why this shortcut is useful follows.

First and foremost, you must realize that a counter is a sequential logic circuit; which means the output of the circuit depends not just on the input but also on the past behavior of the circuit. For example, if the present state of our four-bit counter is 1010, then we know that the previous state must have been 1001 and that the next state will be 1011; in fact, from Figure 1 or the interactive circuit above, you should see that if all you know of a counter is the value of the input signals Clk and E, then you have no idea what the next state is going to be.

Now that we have established a counter as a sequencer, the next time-saving observation is to realize that all sequential circuits inevitably comprise flipflops and latches; otherwise sequencers could not store information. And since the set of flipflops and latches is very small (i.e. RS, D, JK, T), we could as well pick which flipflops we wish to use from the outset and design around that type of flipflop. Of course, the choice of flipflop is not so arbitrary when you recall that T flipflops are built with JK flipflops, which are built with D flipflops, which are built with RS flipflops, which in turn are the most basic useful storage elements (this list of relations is not exhaustive, but it is representative). In general, we tend to design with D flipflops. For instance, VHDL, Verilog, and all other major integrated circuit design software use D flipflops to build sequencers. There are many reasons D flipflops are preferred; one is because they simply clock the input signal without changing it (i.e. for all D flipflops, Q = D as time passes). So for example, if Y is the input to and y is the output of a D flipflop, then y will be equal to Y as time passes. You will develop a greater appreciation for this fact as we formulate the Boolean expressions for our four-bit counter.

Having chosen to use D-flipflops to synthesize our four-bit counter, all we really have left to do is find the flipflop input equations. The input equations are actually the equations for the next states W, X, Y, and Z. We refer to them as input equations because W, X, Y, and Z are the inputs to the D flipflops (see Figure 1). These input equations are combinational circuits and so are easy to formulate: each next state variable is a function of E, w, x, y, and z.

For output W:

E = 0 E = 1
Karnaugh Map Table for W Karnaugh Map Table for W

Table 2: Karnaugh Map for W

W = wE’ + (wy’ + wx’ + wz’ + w’xyz)E

For output X:

E = 0 E = 1
Karnaugh Map Table for X Karnaugh Map Table for X

Table 3: Karnaugh Map for X

X = xE’ + (xy’ + xz’ + x’yz)E

For output Y:

E = 0 E = 1
Karnaugh Map Table for Y Karnaugh Map Table for Y

Table 4: Karnaugh Map for Y

Y = yE’ + (y’z + yz’)E

For output Z:

E = 0 E = 1
Karnaugh Map Table for Z Karnaugh Map Table for Z

Table 5: Karnaugh Map for Z

Z = zE’ + z’E

Rewriting the four input equations together, we get:

W = wE’ + (wy’ + wx’ + wz’ + w’xyz)E
X = xE’ + (xy’ + xz’ + x’yz)E
Y = yE’ + (y’z + yz’)E
Z = zE’ + z’E

At first glance there seems to be no pattern but madness in these equations. After rearranging the equations, however, you should see how you can easily extend the techniques you learn here to create counters of any size whatsoever. So let's rearrange the expressions, starting with the least significant bit.

For Z:

Z = zE’ + z’E
= z (xor) E

For Y:
Y = yE’ + (y’z + yz’)E
= yE’ + y’zE + yz’E After expanding the E
= y(E’ + z’E) + y’zE After factoring out the y
= y(E’ + z’) + y’zE After applying DeMorgan’s A + A’B = A + B
= y (zE)’ + y’(zE) After applying DeMorgan’s A’ + B’ = (A + B)’
= y (xor) (zE) After rewriting in XOR form.


For X:
X = xE’ + (xy’ + xz’ + x’yz)E
= xE’ + xy’E + xz’E + x’yzE After expanding the E
= x(E’ + y’E + z’E) + x’yzE After factoring out the x
= x(E’ + y’ + z’E) + x’yzE After applying DeMorgan’s to E’ + y’E = E’ + y’
= x(E’ + y’ + z’) + x’yzE After applying DeMorgan’s to E’ + z’E = E’ + z’
= x(yzE)’ + x’yzE After applying DeMorgan’s to E’ + y’ + z’ = (yzE)’
= x (xor) (zyE) After rewriting in XOR form.


For W:
W = wE’ + (wy’ + wx’ + wz’ + w’xy)E
= wE’ + wy’E + wx’E + wz’E + w’xyE After expanding the E
= w(E’ + y’E + x’E + z’E) + w’xyzE After factoring out the w
= w(E’ + y’ + x’E + z’E) + w’xyzE After applying DeMorgan’s to E’ + y’E = E’ + y’
= w(E’ + y’ + x’ + z’E) + w’xyzE After applying DeMorgan’s to E’ + x’E = E’ + x’
= w(E’ + y’ + x’ + z’) + w’xyzE After applying DeMorgan’s to E’ + z’E = E’ + z’
= w(zyxE)’ + w’xyzE After applying DeMorgan’s to E’ + y’ + x’ + z’ = (zyxE)’
= w (xor) (zyxE) After rewriting in XOR form.

So the equations from least significant bit to most significant bit are:

Z = z (xor) E
Y = y (xor) (zE)
X = x (xor) (zyE)
W = w (xor) (zyxE)

Do you see the pattern yet? If we use D0, D1, D2, D3, …, Dn instead of Z, Y, X, W, …, ETC. as the next state signals, and we use Q0, Q1, Q2, Q3, …, Qn instead of z, y, x, w, …, etc. as the present state signals; then the pattern for the input equations would be as follows:

D0 = Q0 (xor) EQ0
D1 = Q1 (xor) EQ0
D2 = Q2 (xor) EQ0Q1
D3 = Q3 (xor) EQ0Q1Q2
Dn = Qn (xor) EQ0Q1Q2Q3…Qn-1

At this point we can build the circuit. But before we do, let’s address the influence of time on the operation of the circuit.

At the beginning we said that a counter will run through a predetermined sequence of numbers continuously as long as time exists. What this means in practice is that the essential input to a counter circuit is a clock signal. In other words, a clock signal (Clk) must serve as the driving impetus moving the circuit from state to state. This clock signal is incorporated into the circuit through the clock input of the flipflop: all the flipflops are directly wired to the clock input switch Clk; the clock signal also serves to synchronize the flipflops.

From here on we will assemble the circuit, starting with the least significant bit. We show you the steps so you may follow the practice of testing your work as you build so as to catch errors early in the synthesis process.

Here is the circuit for the least significant bit Z. Notice that this circuit is also a one-bit counter that counts from 0 to 1 (2¹-1) and back again to 0, 1, etc.

The interactive 1-bit counter digital logic circuit, with Boolean function
Circuit 1 — Play around with the 1-bit counter to see that it works


Now we add the circuit for Y, turning the circuit into a 2-bit counter that counts from zero to three (2²-1).

The interactive 2-bit counter digital logic circuit, with Boolean function
Circuit 2 — Play around with the 2-bit counter to see that it works


We will add the X bit the same way. At this point you should see the pattern and how to extend the counter ad infinitum. This 3-bit counter can count from zero to seven (2³-1).

The interactive 3-bit counter digital logic circuit, with Boolean function
Circuit 3 — Play around with the 3-bit counter to see that it works


Do you anticipate what block we will add to create a 4-bit counter? A AND Gate, a XOR Gate, and a D Flipflop! Here is the 4-bit circuit.

The interactive 4-bit counter digital logic circuit, with Boolean function
Circuit 4 — Play around with the 4-bit counter to see that it works


Notice that in creating a 4-bit counter, you have incidentally created a 1-bit, 2-bit, and 3-bit counter along the way. What this means is you can connect blocks of counters to build larger counter. For this reason, the final circuit below includes an output carry bit. The carry bit allows designers to chain small counters to build larger counters. For example, a carry bit can be connected into the Enable input of another 4-bit counter to form an 8-bit counter.

The interactive 4-bit counter with carry output digital logic circuit, with Boolean function
Circuit 5 — Play around with the 4-bit counter with carry output to see that it works

I am going to trust you to allow me to show you one final trick. Circuit 5 uses D-latches instead of D-flipflops. Therefore, it is not really the same as the main interactive circuit at the top of the page. Can you guess the difference? For one thing Circuit 5 is cheaper to build, because latches are cheaper than flipflops. But that’s not the main concern. The problem with Circuit 5 is that if the Enable switch flickers OFF and ON while the clock signal is risen (i.e. ON), the counting values will change. That’s not supposed to happen. Therefore, unless you can guarantee that the Enable signal will not change while the clock signal is HIGH, use flipflops instead of latches.